Fairness engineering
The mechanisms that make equal speed an engineered guarantee rather than a hope — equalized paths, fair gateways, honest ordering — and the market designs that make speed matter less at all.
Wire-to-wire measurement and tail control reveal when participants experience different paths. Fairness requires a rule for ordering the race, not just a fast implementation.
It is tempting to run identical gateway software and timestamp after each gateway's local queue, then call the resulting order fair. The constraint it misses is simple: Equal physical opportunity precedes one common ordering boundary; simultaneous arrivals are stamped before shared queuing, served in stamp order, and released through symmetric egress.
Inside the wire-to-wire window, unfairness hides in three places, each with an engineering answer:
flowchart TB
PA["Participant A — rack 5 m from the exchange switch"] -- "fiber coiled to exactly 250 m" --> SW["Exchange access switch"]
PB["Participant B — rack 200 m away"] -- "fiber run of exactly 250 m" --> SW
SW --> TS["Hardware timestamp at first touch — THE finish line: arrival order fixed here, auditable forever (4.2)"]
TS --> GWQ["Gateways poll all sessions round-robin — one firm's message flood cannot bury another's single cancel (2.7)"]
GWQ --> SEQ["Sequencer processes in stamped arrival order — no reordering downstream (1.7)"]
MDOUT["Market data egress — released to all ports simultaneously, cable lengths equalized again (0.1)"]
SEQ -.-> MDOUT
- Equalized ingress. Same cable length, same switch generation, same port speed for every colo participant. Everything before the timestamp is the race the exchange promised to referee impartially; everything after it is FIFO by stamp. Note why timestamping alone isn't enough: the stamp must be taken at a point participants reach fairly — a timestamp after an unfair queue merely notarizes the unfairness (0.2's audit-trail obligation, applied to nanoseconds).
- Fair sharing inside. Round-robin polling across sessions at gateways, per-participant throttles (1.6, 2.7) — one member's message storm degrades their own queue, not the hall's. The 2.7 overload ladder was fairness engineering all along; the same policy now operates at microsecond rather than millisecond resolution.
- Simultaneous egress. Market data (0.1's "at once" requirement) leaves all ports in the same transmission cycle, cables equalized again — and private fills must not systematically precede the public print, or the counterparty's counterparty learns the price late (1.2's private/public twin rule, now with a stopwatch).
Then there is the deeper move: changing the game so speed buys less. Two designs worth knowing, both real. A speed bump — a fixed delay (IEX's famous 350 µs coil of fiber) applied to all incoming orders, giving the venue's own systems time to update reference prices before fast traders can exploit stale ones: latency arbitrage's profit window is surgically removed while everyone's relative speed is preserved. And frequent batch auctions — run the 1.6 auction mechanism every 100 ms instead of matching continuously: within each batch, arrival order doesn't matter at all, so the nanosecond arms race becomes economically worthless by construction. Both are the 3.1 mindset applied to speed: ask what the contract actually requires — fair price formation — and spend engineering there, not on the arms race's scoreboard.
One firm's rack is 30 meters closer. A timestamp taken after separate queues merely notarizes the physical advantage. Equalized fiber or calibrated delay must remove the advantage before the common stamp can express fair arrival order.
Equalize ingress, share fairly inside, release simultaneously — and place the finish line before anything shared. Timestamps notarize; only physical equalization makes the race fair to begin with. Speed bumps and batch auctions redesign the game so nanoseconds stop paying — fairness by market design.